The present invention relates to an improved spin on glass material having an excellent burying property and capability of preventing generations of cracking and cavities, and further relates to a method for applying an improved spin on glass material for fabricating a semiconductor multilevel interconnection structure.
As recent requirement for increase in the density of integration of LSI circuits has been on the increase, differences in level of a surface of the LSI circuit device has also been enlarged. In this circumstances, how to realize planarization of the LSI circuit device has been now a very important issue for obtaining improvement in the density of the integration of LSI circuits.
A further recent requirement has been of how to obtain an improvement in high speed performance of LSI circuits. In order to satisfy this requirement, it is necessary to reduce an interconnection resistance of a gate electrode and a sheet resistance of source/drain regions. For the purpose of obtaining those required reductions, it is effective to provide either a titanium silicide thin film or a cobalt silicide thin film on the gate electrode and on the source/drain diffusion regions.
It is disclosed in 1982 IEEE IEDM, pp. 714-717 to use a self aligned silicide technique for forming a the above titanium silicide thin film or cobalt silicide thin film on the gate electrode and on the source/drain diffusion regions. This method can reduces the sheet resistances of the gate electrode and the source/drain diffusion regions. In this case, a boron phosphate silicate glass film may be used as an inter-layer insulator. The phosphorus containing insulator is useful to prevent heavy metals such as Na from arriving the surface of the semiconductor layer or substrate. The use of the phosphorus containing insulator was essential in the prior art of LSI technique.
The conventional method for forming the inter-layer insulator will be described with reference to FIGS. 1A through 1D, wherein a boron phosphate silicate glass film is used as an inter-layer insulator. With reference to FIG. 1A, field oxide films 2 are selectively formed on a surface of a semiconductor substrate 1. Laminations of a gate oxide film 3 and a gate electrode 4 are selectively formed on the semiconductor substrate 1. Source and drain diffusion regions 5 and 6 are formed by ion-implantations with a self-alignment technique. Side wall oxide films 7 are selectively formed at opposite sides of the gate electrode 4. A titanium silicide film 8 is selectively formed on the source and drain diffusion regions 5 and 6 as well as on the gate electrode 4.
With reference to FIG. 1B, a silicon oxide film 9 is deposited on an entire surface of the device by a normal pressure chemical vapor deposition method using monosilane and oxygen.
With reference to FIG. 1C, tetraethokythysilane, triethylborate, trimethylphosphate and oxygen are used for a low pressure chemical vapor deposition method to a boron phosphate silicate glass film 16 on an entire surface of the silicon oxide film 9. The deposited boron phosphate silicate glass film has a large difference in level on the surface. When the aspect ratio is large, it may be difficult to obtain a complete burying with the boron phosphate silicate glass film. For this reason, it is likely caused that the deposited boron phosphate silicate glass film has cavities. The large difference in level of the surface of the deposited boron phosphate silicate glass makes it difficult to obtain fine patterns of the interconnections on the boron phosphate silicate glass. If the interconnections are formed on the boron phosphate silicate glass film having the cavities and subsequently the boron phosphate silicate glass film is heated up and cooled down, then airs confined in the cavities are expanded and compressed. As a result, the interconnections formed on the boron phosphate silicate glass film having the cavities receive stresses when the airs confined in the cavities are expanded and compressed. In order to solve those problems, it is effective to subject the boron phosphate silicate glass film having the cavities to the reflow process at a high temperature to exclude the cavities therefrom.
With reference to FIG. 1D, for the above reasons, the surface of the deposited boron phosphate silicate glass film 16 is planerized. The deposited boron phosphate silicate glass film 16 is then reflowed in nitrogen atmosphere at a high temperature of not less than 850.degree. C. to exclude cavities therefrom. The temperature in the reflow process is required to be not less than 850.degree. C. If, however, the boron phosphate silicate glass is subjected to the reflow process at such high temperature, then a cohesion of the titanium silicide film 8 is caused whereby a resistance of the cohered titanium nitride film 17 is increased. In order to prevent this cohesion of the titanium nitride film 8, it is required to reduce the temperature of the reflow process down to not more than 800.degree. C. If, however, the reflow process were carried out at the temperature not more than 800.degree. C. so as to prevent any cohesion of the titanium silicide film 8, then the cavities still remain in the boron phosphate silicate glass film 16.
Alternatively, it has been proposed to use the spin on glass film as a part of the inter-layer insulator. The spin on glass material may be prepared by hydrolyzing and dehydrating tetraalkoxysilane. The conventional method for forming the spin on glass film as the inter-layer insulator will be described hereafter with reference to FIGS. 2A through 2C. With reference to FIG. 2A, field oxide films 2 are selectively formed on a surface of a semiconductor substrate 1. Laminations of a gate oxide film 3 and a gate electrode 4 are selectively formed on the semiconductor substrate 1. Source and drain diffusion regions 5 and 6 are formed by ion-implantations with a self-alignment technique. Side wall oxide films 7 are selectively formed at opposite sides of the gate electrode 4. A titanium silicide film 8 is selectively formed on the source and drain diffusion regions 5 and 6 as well as on the gate electrode 4.
With reference to FIG. 2B, a normal pressure chemical vapor deposition method is carried out using monosilane, phosphorus and oxygen as source gases to deposit a phospho silicate glass film on an entire surface of the device. The deposited phospho silicate glass film is reflowed to planerlize the surface of the deposited phospho silicate glass film thereby resulting in a planerized phospho silicate glass film being obtained. The above reflow process is carried out at a temperature of 900.degree. C. in the nitrogen atmosphere. In this reflow process, a cohesion of the titanium silicide film 8 is caused to form a cohered titanium silicide film 17 having a high receptivity.
With reference to FIG. 2C, a spin on glass material is applied on the phospho silicate glass film. The spin on glass material applied is then buried to form a first spin on glass film 20. Further, the spin on glass material is again applied on the first spin on glass film 20 and then buried to form a second spin on glass film 21 on the first spin on glass film 20. Sets of such applications of the spin on glass material and subsequent burning processes are repeated until when the desired thickness of the spin on glass films laminated is obtained.
As described above, the spin on glass material is prepared by the hydrolyzation and dehydration of tetraalkoxysilane to form the spin on glass film. However, this spin on glass film is likely generated with cracking. A critical thickness of each of the spin on glass films is 200 nanometers for suppressing the generation of cracking. Plural sets of applications of the phospho silicate glass material and subsequent reflow processes and burring thereof are repeated until the desired thickness is obtained. This results in a complicated fabrication process.
Further, as described above, the reflow process and the burring process are carried out at a high temperature of 900.degree. C. Such high temperature heat treatment causes the cohesion of the titanium silicide film 8 whereby the cohered titanium silicide film is formed, which has a high resistivity.
As described in the Japanese laid-open patent application No. 4-10418, the spin on glass material may be prepared from alkoxysilane which is represented by the general formula of R.sub.n Si(OR* ).sub.4-n, where R and R* are alkyl groups of one or more carbon atoms, aryl groups of one or more carbon atoms, or vinyl groups of one or more carbon atoms, and n is the integer of 1-3. Further, as disclosed in the Japanese laid-open patent application No. 2-233531, there is available as the spin on glass material Si(OH).sub.4 or Si(OC.sub.2 H.sub.5).sub.4 added with germanium. In those cases, the heat treatments may be carried out at a lower temperature than those described above. However, in the dehydration process, a large variation in volume of the spin on glass film is caused. Such large variation in volume of the spin on glass film causes cracking therein. Moreover the repeat of the silicon on glass material application and subsequent reflow and burring processes makes the fabrication process complicated.
In the above circumstances, it had been required to develop a novel spin on glass material free from the above problems and disadvantages.